1. Field of the Invention
The invention relates to a method and apparatus for converting an analogue input signal into a digital representation. In particular, the invention relates to an apparatus for providing a digital representation of an analogue signal having characteristics advantageous for waveform matching and prediction.
2. Discussion of Prior Art
Analogue to Digital Converters (ADCs) enable an analogue input signal to be converted into a digital representation of the input signal which preserves information contained in the input signal. In the simplest ADC form, the zero-crossing discriminator, the output changes from a logical naught to a logical one when the input voltage crosses a reference voltage of zero volts. The input signal is transformed into a hard-limited telegraph function [D. Middleton and J. H. Van Vleck, IEEE, 54, 1 (1966)]; a simple sequence of naughts and ones. The spectral information contained in the input signal is also contained in the telegraph function, subject to a scaling factor, because the spectral information in the output digital representation is principally carried in the time intervals between the zero-crossings.
More sophisticated ADCs comprise a number of threshold-crossing discriminators each with its own reference voltage, where adjacent reference voltages are spaced apart by a common amount. For example, the outputs of sixteen discriminators expressed as a binary code would indicate that the input voltage lay somewhere between two particular reference voltages. However, for any significant amount of noise at the input, the input signal cannot be considered static during the conversion processes, causing the output digital representation to change rapidly and be almost indeterminate. To overcome this problem the input signal is held constant using a xe2x80x9ctrack and holdxe2x80x9d circuit and the resulting unambiguous output digital representation during the xe2x80x9choldxe2x80x9d phase is latched into a register by sample pulses which occur at equally spaced intervals of time. At the same time, the output digital representation may be made more compact.
Analogue to digital conversion methods in which the input analogue signal is periodically sampled at a predetermined constant rate and each sampled value is converted into a corresponding digital representation are standard. To convert analogue signals having high frequency components, a higher sampling rate must be used, resulting in an increased amount of output digital information. Furthermore, the high sampling rate results in an increased amount of unnecessary digital information for sections of the analogue input which have a relatively low frequency. For analogue signals having both high and low frequency components, a low sampling rate is not appropriate as the high frequency components cannot then be correctly identified. Conventionally, the choice of regular sampling rate is subject to the well known xe2x80x9cNyquist sampling criterionxe2x80x9d.
Furthermore, constant sampling rate analogue to digital conversion techniques are not particularly suitable for waveform matching and time series recognition applications. By sampling an analogue input amplitude at a fixed rate, two similar signals evolving in two different timescales, such as a car engine running at two different speeds, will give rise to two different output digital representations. Even though the two signals originate from the same source, the two different output digital representations will not be recognised as such due to the different timescales with which the input signals evolve.
In time series recognition applications, the analysis of data in the time domain may be used to extract information from a single channel sensor. A time series may be used to construct a trajectory evolving through multi-dimensional phase space which evolves with time over the surface of a geometrical object. The comparison of one such geometrical object, in particular a standard one, with a measured one provides a comparison of the state of one physical system with another. U.S. Pat. No. 5,835,682 describes a Heuristic processor which computes a multi-dimensional, nonlinear, predictive model constrained to predict the next sample of the time series from which it was calculated. The input data to the Heuristic processor are digital representations of analogue source signals for which conventional uniform sampling rate ADCs are employed. However, the use of uniform sampling rate analogue to digital converters has the inherent problem of introducing inaccuracies in the comparison of the predicted to measured time series. This degrades the temporal dependence and therefore has limitations when used for time series recognition applications.
The foundations of a general theory for randomised signal processing are discussed by I. Bihnskis and A. Mikelsons in xe2x80x9cRandomised Signal Processingxe2x80x9d (1992, Prentice Hall) which exemplifies the problems and benefits associated with some methods for processing signals subjected to non uniform sampling in time. The theory of non-uniform sampling for the digital encoding of analogue sources has previously been proposed as a means for data compression [IEEE Transactions on Communications, Vol. COM-29, No.1, January 1981 pp.24-32]. In the scheme proposed in this paper, information about an analogue source signal is contained in a digital representation of the time intervals between the crossing of the input analogue signal and any of the number of fixed threshold levels and in the direction of the threshold level crossing (up or down). The scheme is disadvantageous in that the digital representation is not compact and represents the interval between threshold crossings as pairs of zeros output at a regular rate. The pairs of zeros are interspersed with a 2-digit binary code representing direction.
Another sampling technique for analogue to digital conversion is described in IEEE Transactions on Circuits and Systemsxe2x80x94II: Analogue and Digital Signal Processing, Vol. 43, No. 4, April 1996. In this case, the final aim of the technique is to generate samples of the input signal that are uniformly spaced in time. This is done by recording the time instants at which the signal crosses any of the predetermined, fixed, quantisation levels, together with the specific quantisation level information, thus forming an output sequence consisting of xe2x80x9camplitude-timexe2x80x9d ordered pairs. This forms a local reconstruction of the signal which is then re-sampled by interpolation to provide equal interval amplitude samples. Once again, a non-compact sequence of ordered pairs is used to represent the input signal.
U.S. Pat. No. 4,291,299 describes a non-uniform sampling analogue to digital converter for converting analogue signals with large, short-term amplitude excursions. Such signals typically occur on telephone lines affected by lightning strikes or from power system faults. The sampling is non-uniform in both time and amplitude. Before the signal is sampled, multiple predetermined, absolute voltage levels are set as threshold levels. The system samples an input analogue signal and, whenever the input signal or the difference signal between the analogue signal and its last preceding sample, crosses any of the multiple predetermined levels this is detected and a digital code representing the particular level crossed is output This digital code forms part of an output digital word which also comprises a timer circuit count representing the time which has elapsed since the preceding sample occurred
An alternative analogue to digital converter system is described by R. Greenhalgh (IBM Technical disclosure bulletin, Vol. 7, no. 9, February 1965 (1965-02)). This document describes a system in which threshold levels are set at Axc2x1(xcex94A/2), where A is an analogue representation of the digital value stored in a register. If the input signal crosses one of the thresholds the register is reset to the value of the threshold that has been crossed, and a digital signal is output from the system which contains a digital representation of the value stored in the register and a digital representation of the absolute time value of the clock. Alternatively, the direction of the change in amplitude, as indicated by the tick register, is recorded instead of the absolute voltage.
GB2179516 is concerned with sampling an analogue waveform at a frequency significantly greater than the Nyquist frequency. Simple averaging of such an oversampled waveform to produce a waveform at the required sampling rate increases the dynamic range of A-D conversion. However, the method of GB 2179516 increases the dynamic range further by describing the analogue waveform as a mathematical function, from which a digital representation can be output at a desired sampling rate.
It is an object of the present invention to provide a method and apparatus for converting an analogue input signal into a digital representation which overcomes the problems arising from the temporal dependence inherent in constant sampling rate analogue to digital converters. It is a further object of the invention to provide a technique and apparatus for analogue to digital conversion which provides an output digital representation in compact form from which the original input analogue signal can be substantially reconstructed.
For the purpose of this specification, the term xe2x80x98analogue to digital converterxe2x80x99 shall be taken to mean a device for converting an analogue signal into a digital representation by sampling the input signal at a substantially constant rate. The term xe2x80x98analogue to digital interval converterxe2x80x99 shall be taken to mean a device for converting an analogue signal into a digital representation by sampling the input signal at substantially equal changes in amplitude. The term xe2x80x98time seriesxe2x80x99 shall be taken to refer to a sequence of amplitude values generated as a result of sampling an analogue input signal converted with small uncertainties in amplitude, as in a conventional ADC. The term xe2x80x98time sequencexe2x80x99 shall be taken to refer to a sequence of time interval values generated as a result of sampling an analogue input signal converted with small uncertainties in time interval.
According to one aspect of the present invention, an analogue to digital converter for converting an analogue input signal into a digital representation includes;
generation means for generating at least two threshold levels for comparison with the analogue input signal,
comparison means for comparing each of the threshold levels with the input signal and for generating a primary digital output signal to provide an indication that the input signal has crossed one of the threshold levels,
timing means,
characterised in that,
the elapsed period of time between the input signal crossing a first threshold level and the input signal crossing a second threshold level at a later time is determined by the timing means and a secondary digital output signal representing the elapsed period of time is also generated by the timing means,
the secondary digital output signal and the corresponding primary digital output signal being used to provide a digital representation of the analogue input signal.
In a preferred embodiment, the converter also comprises means for receiving the primary digital output signal from the comparison means and for providing an UP/DOWN digital output signal to indicate in which direction, UP or DOWN, the input signal crossed the threshold level, whereby the secondary digital output signals and the associated UP/DOWN digital output signal constitute a digital representation of the analogue input signal.
This provides the advantage that the output from the converter is series of signed, time interval values i.e. a digital representation comprising a series a time interval values having an UP or DOWN (+ or xe2x88x92) sign attached. The output from the converter can therefore be made compact. This is particularly advantageous for input signals which vary slowly with time. Using a conventional analogue to digital converter, which samples at a constant rate, results in a large amount of output data as the low frequency portions of the input signal are oversampled The present invention alleviates this problem as the sampling rate is determined by the local rate of change of the input signal.
Conveniently, the digital representation may be expressed as a 2""s complement number for subsequent input to a computer.
In addition, the analogue to digital interval conversion techniques proposed in the prior art provide a non-compact data output. The present invention is advantageous in that the digital output signal is a compact sequence of time interval values having an UP or DOWN flag attached (+ or xe2x88x92) to indicate the direction of threshold level change for a given time interval.
The comparison means may comprise means for comparing each of the threshold levels with the input signal or, alternatively, means for comparing each of the threshold levels with a signal derived from the input signal.
In a further preferred embodiment, the generation means include adjustment means for adjusting the threshold levels relative to the input signal in response to a threshold level crossing. This provides the advantage that only two threshold levels need be used as they can be made to track the input signal as it evolves in time.
In one embodiment of the invention, the adjustment means may comprise means for adjusting the threshold levels themselves in response to a threshold level crossing.
In this embodiment, the comparison means may comprise two comparators, each receiving the input signal and a different one of two threshold levels, UPPER or LOWER, forming an amplitude window about the current input signal, whereby if the input signal crosses one of the threshold levels the corresponding comparator generates a primary digital output signal to a subsequent logic stage for generating the UP/DOWN digital output signal.
In addition, the generation means may comprise two digital to analogue, each for generating a different one of the two threshold levels, UPPER or LOWER, for input to the associated comparator, whereby the digital to analogue converters each receive a digital input determined by the direction of the UP/DOWN digital output signal generated by the preceding threshold level crossing.
The digital to analogue converters may receive the digital inputs via counter means which serve to increasingly or decreasingly adjust the threshold levels accordingly in response to the UP/DOWN digital output signal generated by the preceding threshold level crossing.
Alternatively, the digital to analogue converters may receive the digital inputs from a logic circuit which serves to increasingly or decreasingly adjust the threshold levels accordingly in response to the UP/DOWN digital output signal generated by the preceding threshold level crossing.
Preferably, following each threshold crossing, the threshold levels are substantially equal to VREF+xcex94V and VREFxe2x88x92xcex94V, where VREF is the value of the analogue input signal as the threshold level crossing occurs and xcex94V is a pre-set threshold voltage.
Alternatively, instead of adjusting the threshold levels themselves, the signal derived from the input signal may be adjusted in response to the derived signal crossing a threshold level.
For example, the converter may comprise,
sample and hold means for sampling the analogue input signal to provide a sample input value,
whereby the sample and hold means hold the sample input value until such time as the analogue input signal crosses one of the two, fixed threshold levels, +xcex94V or xe2x88x92xcex94V, at which time the sample input value is adjusted, thereby adjusting the threshold levels relative to the input signal.
In this embodiment, the converter may comprise;
a differential amplifier, receiving at one input the sample input value and receiving at the other input the evolving analogue input signal, the differential amplifier providing an output signal derived from the input signal, and
two comparators for comparing each of two, fixed threshold levels, +xcex94V, xe2x88x92xcex94V, with the derived signal and for providing the primary digital output signal to provide an indication that the derived signal, and therefore the input signal, has crossed a threshold level.
The converter may further comprise;
an absolute level crossing detection means, whereby the absolute-level crossing detection means provide an output each time the analogue input signal crosses the absolute level, and
means for adjusting the threshold levels relative to the analogue input signal in response to the absolute-level crossing detection output so as to correct for any cumulative errors in the threshold levels as required.
This provides the advantage that any cumulative errors in the adjusted threshold levels or in the adjusted value of the input signal can be corrected for.
In one embodiment, the threshold levels themselves may be adjusted in response to the absolute-level crossing detection output. Alternatively, the analogue input signal may be adjusted in response to the absolute-level crossing detection output. Typically, the absolute-level crossing detection means may be a zero-crossing detection means.
In an alternative embodiment of the invention, the converter may comprise a flash analogue to digital converter for generating a plurality of fixed, digital threshold levels and for converting the analogue input signal into a binary coded digital output, and wherein the comparison means comprise logic circuitry for comparing the current binary coded digital output with the previous binary coded digital output to determine whether and in which direction a threshold level crossing occurred. Typically, the logic circuitry compares at least the two least significant bits of the binary coded digital output with at least the two least significant bits of the previous binary coded digital output to determine whether and in which direction a threshold level crossing occurred.
The timing means may comprise a timer counter for measuring the elapsed period of time which occurs between threshold level crossings. The timer counter may comprise means for determining when the maximum count has occurred.
In any of the embodiments of the invention, the converter may also comprise means for initially normalising the analogue input signal such that any two or more analogue input signals input to the converter have a common amplitude scaling. This is particularly advantageous for waveform matching or time series recognition applications.
The converter may also comprise an anti-aliasing filter which serves to limit the fastest rate of change of the analogue input signal so that the time interval to which the fastest rate of change corresponds is greater than the time the converter takes to provide an output digital representation following a threshold level crossing.
According to a second aspect of the invention, a nonlinear system analyser for analysing an analogue input signal is characterised in that it comprises;
the analogue to digital converter as herein before described, for generating a digital representation of the input analogue signal,
processing means for receiving said digital representation and for generating a multi dimensional nonlinear predictive model, wherein the model is constrained such that it predicts the subsequent input signal.
The non linear system analyser may also comprise means for comparing the predicted sample input signal with the measured input signal.
According to third aspect of the invention, a method of converting an analogue input signal into a digital representation comprises the steps of;
(i) generating at least two threshold levels (UPPER, LOWER),
(ii) comparing the at least two threshold levels with the input signal,
(iii) generating a primary digital output signal to provide an indication that the input signal has crossed one of the threshold levels,
characterised in that it comprises the additional steps of,
determining the elapsed period of time between the input signal crossing a first threshold level and the input signal crossing a second threshold level at a later time,
producing a secondary digital output signal representing the elapsed period of time between the input signal crossing a first threshold level and the input signal crossing a second threshold level at a later time, and
providing a digital representation of the input signal from the secondary digital output signal and the corresponding primary digital output signal.
The method may comprise the further steps of;
providing a single UP/DOWN digital output signal from the primary digital output signal to indicate in which direction, UP or DOWN, the input signal crossed the threshold level, and
providing a digital representation of the input signal comprising the secondary digital output signals and the associated UP/DOWN digital output signal.
The method may further comprise the step of expressing the digital representation as a 2""s complement number. This provides the advantage that for subsequent computer processing.
The method may comprise the further step of adjusting the threshold levels relative to the input signal in response to a threshold level crossing.
The method may comprise the step of comparing the input signal with two threshold levels. In this case, the method may comprise the step of adjusting the threshold levels themselves in response to the input signal crossing a threshold level so as to adjust the threshold levels relative to the input signal.
Alternatively, a signal derived from the input signal may be compared with the threshold levels. In this case, the method may comprise the step of adjusting the derived signal in response to the derived signal crossing a threshold level so as to adjust the threshold levels relative to the derived signal.